ASIC Verification Engineer

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ASIC Verification

Mainly focused on enhancing the Design Verification skills needed by industry.

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Course Details

Duration	Mode	Timings	Availability
3 Months	Online / Offline	9-10 AM	Part time

Course Overview

Digital
• Introduction • Number systems,Adders,Multiplexer and Decoders • FlipFlop • Shift Registers,Counters

Verilog
• Datatypes Operators • Function and Tasks • System TasksCompiler Dircetives • Prcoedural blocks • Blocking and Non Blocking • Delayscontinuous assignmentTimescale • Branching constructsloop constructs • DUT and TB implementation for Adders,Multiplexer • DUT and TB Decoders • DUT and TB implementation FlipFlops • DUT and TB Counters,Shift Registers

System Verilog
• DATA TYPESARRAYS • FORK JOIN, FORK JOIN_ANY and FORK JOIN_NONE • OOPS-1 • OOPS-2 • RANDOMIZATIONCONSTRAINTS-1 • CONSTRAINTS-2 • MAILBOXSEMAPHORE • INTERFACE ,VIF,Modports,Colcking blocks • Memory Controller-SV Project-Session 1 • Memory Controller-SV Project-Session 2 • SV Interview questions.

UVM
• UVM Factory,UVM PhasesReporting Mechanism • TLM overviewUVM configuration • Creating TB components • UVM sequence • Memory Controller-UVM Project-Session 1 • Memory Controller-UVM Project-Session 2 • Functional Coverage and code coverage • I2C specification,UVM Interview questions-1 • I2C specification,UVM Interview questions-2

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ASIC Verification Engineer